for master MCU

...
have_key:
	   mov	6ah,#01h
	   mov	6bh,#02h
	   mov	6ch,#03h
	   mov	6dh,#04h
	   mov	6eh,#05h
	   mov	6fh,#06h
	   lcall upload_to_line
	   clr	key.0
           jmp     begin
...

upload_to_line:
	push	05h
	push	00h
	mov	r5,#6
	mov	r0,#6ah

loop_upload_to_line:
	mov	rack_data,@r0
	lcall	send_to_rack
;      lcall   delay_50us		;wait for slave complete
	inc	r0
	djnz	r5,loop_upload_to_line
      lcall   delay_125ms		;wait for slave complete
	pop	00h
	pop	05h
	ret
.....

send_to_rack:
        push    02h
        push    01h
        push    acc
        mov     r1,#8
        mov     a,rack_data
        mov     r2,#45
        clr     txdn
        djnz    r2,$
 putc1:
        rrc     a
        mov     txdn,c
        mov     r2,#45
        djnz    r2,$
        djnz    r1,putc1
        setb    txdn
        mov     r2,#45
        djnz    r2,$
        pop acc
        pop     01h
        pop     02h
        ret

....



for slaver MCU

...
receiver_data_from_master:
	mov	r0,#30h
	mov	r3,#6
loop_receiver:
        lcall   receive_from_rack	
	mov	@r0,final
	inc	r0
	djnz	r3,loop_receiver

	mov	temp,#50h			;for test only
	acall	mcu_to_rom			;for test only
	jmp	out_receiver_data_from_master
...


 receive_from_rack:
         push    02h
         push    01h
        push acc
get_char_1:
         mov     r2,#20
         mov     r1,#8
         jb       rxdn,$
         djnz    r2,$
 get_char:
         mov     r2,#45
         djnz    r2,$
         mov     c,rxdn
         rrc     a
         djnz    r1,get_char
         mov     final,a
	pop acc
         pop     01h
         pop     02h
         ret