Some architectures (mcs51/ds390) have an atomic bit test and clear instruction. 
These type of instructions are typically used in preemptive multitasking systems, 
where a routine f.e. claims the use of a data structure ('acquires a lock on it'), 
makes some modifications and then releases the lock when the data structure is consistent again. 
The instruction may also be used if interrupt and non-interrupt code have to compete for a resource. 
With the atomic bit test and clear instruction interrupts don't have to be disabled for the locking operation.

SDCC generates this instruction if the source follows this pattern:

    volatile bit resource_is_free;  
     
    if (resource_is_free)  
      {  
        resource_is_free=0;  
        ...  
        resource_is_free=1; 
      } 

Note, mcs51 and ds390 support only an atomic bit test and clear instruction (as opposed to atomic bit test and set).